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 1CY M74 S43 0/31
PRELIMINARY
CYM74B430 CYM74P430/31 CYM74S430/31
Intel(R) 82340FX PCIset Level II Cache Module Family
Features
* Pin-compatible secondary cache module family that ad-
heres to the Intel COAST 1.1 specification
* Asynchronous (CYM74B430), synchronous pipelined
(CYM74P430, CYM74P431), or synchronous (CYM74S430, CYM74S431) configurations with presence and configuration detect pins
* Ideal for Intel(R) P54C-based systems with the 82430FX
CYM74B430 is an asynchronous 256-Kbyte cache module that provides a low-cost, high-performance solution with industry standard 32Kx8 5V SRAMs and 3.3V level translators. The CYM74B430 is organized as 32K by 64-bits with an 8Kx8 tag that supports 3-2-2-2 read and 4-2-2-2 write cycles at CPU bus speeds up to 66 MHz. The synchronous modules are available with low cost synchronous pipelined RAMs, or high performance synchronous burst RAMs. The synchronous pipelined modules are based on a 16Kx64 RAM. The CYM74P430 is a 256-KB module while the CYM74P431 is a 512-KB module. The CYM74S430 and CYM74S431 are high performance synchronous burst cache modules that provide 256 KB and 512 KB of cache respectively. The modules support 3-1-1-1 performance at 66 MHz. Multiple ground pins and on-board decoupling capacitors ensure high performance with maximum noise immunity. All components on the cache modules are surface mounted on a multi-layer epoxy laminate (FR-4) substrate. The contact pins are plated with 150 micro-inches of nickel covered by 10 micro-inches of gold flash.
8Kx8 WE AD CE OE 5V PD4 GND PD3 NC PD2 GND PD1 GND PD0 NC
(Triton) chipset
* Operates at 50, 60, and 66 MHz * Uses cost-effective CMOS asynchronous SRAMs or
high-performance synchronous SRAMs
* 160-position Burndy DIMM CELP2X80SC3Z48 connec-
tor*3.3V compatible inputs/data outputs
Functional Description
This family of secondary cache modules is designed for Intel P54C systems with the 82430FX (Triton) chipset.
Logic Block Diagram - CYM74B430
TWE CS GND A[17:5] ADDRESSLATCH LA[17:5] CALE LE
FCT373C
TIO[7:0]
32K x 8 D D A CE OE CWE1 A CE OE CWE2 D A CE OE CWE3 D
D[7:0] D[15:8] D[23:16] D[31:24]
CAA[4:3]
A CE OE CWE0 COE CWE[3:0]
32K x 8 D A CE OE CWE4 A CE OE CWE5 D A CE OE CWE6 D A CE OE CWE7 D
D[39:32] D[47:40] D[55:48] D[63:56]
CAB[4:3]
74B430-1
CWE[7:4]
Intel is a registered trademark of Intel Corporation. Cypress Semiconductor Corporation * 3901 North First Street * San Jose * CA 95134 * 408-943-2600 December 1994 - Revised October 1995
PRELIMINARY
Block Diagram: 5V to 3.3V Level Conversion (CYM74B430)
5.0 Volts VCC 100 ohms
CYM74B430 CYM74P430/31 CYM74S430/31
5V SRAM
64 Bit Bus Switch (uses7CYBUS3384) 4.3V zener 5% tolerance
D
A GND
B BE
3.3V compliant I/O
74B430-2
Logic Block Diagram - CYM74P430,CYM74P431
PD4 8Kx8(CYM74P430) 32Kx8(CYM74P431) TAGWE A18-A 5 WE D A13:0 A18-A 5 CYM74P431ONLY D63-D 0 TIO[7:0] CYM74P430 TBD CYM74P431 TBD PD3 TBD TBD PD2 TBD TBD PD1 TBD TBD PD0 TBD TBD
CLK1 CLK0 CK D A1-A 3 CWE7-CWE 0 ADSP ADSC ADV CCS COE GWE BWE A
14 8
CK D A BE0-BE 7 ADSP ADSC ADV CS0 OE GWE BWE CS4 VCC GND CS1 CS3 VCC CS2 CS4
CK D A BE0-BE 7 ADSP ADSC ADV CS0 OE GWE BWE CS1
CK D A BE0-BE 7 ADSP ADSC ADV CS0 OE GWE BWE CS4 VCC GND CS1 CS3 GND CS2 CS4 CS3
BE0-BE 7 ADSP ADSC ADV CS0 OE GWE BWE CS1 CS2
CS3 VCC GND CS2
A17 CYM74P430(GND) CYM74P431(A18)
16Kx64
16Kx64
16Kx64
16Kx64
74B430-3
2
PRELIMINARY
CYM74B430 CYM74P430/31 CYM74S430/31
Logic Block Diagram - CYM74S430/CYM74S431
[1]
8Kx8(CYM74S430) 32Kx8(CYM74S431) TWE A[18:5] GND GND CE OE WE D
PD4 CYM74S430 GND CYM74S431 GND
PD3 NC GND
PD2 GND NC
PD1 NC NC
PD0 GND GND
TIO[7:0]
5V D[63:0] D D[15:0] D D[31:16] A ADSP ADSC ADV CE OE WE2/3 A ADSP ADSC ADV CE OE WE4/5 D D[47:32] A ADSP ADSC ADV CE OE WE6/7 32Kx18(CYM74S430) 64Kx18(CYM74S431) 3.3V D D[63:48]
A[18:3]
A ADSP ADSC ADV CE OE WE0/1
ADSP ADSC ADV
CLK0 CLK1 CCS COE CWE[7:0]
Note: 1. A18 is not used by CYM74S430. DP pins are pulled high through 10K.
74B430-4
3
PRELIMINARY
Selection Guide
Asynchronous Cache Modules Part Number Cache Size System Clock (MHz) Data tAA Tag tAA 256 KB 50 20 ns 30 ns 60 17 ns 20 ns 74B430-50 74B430-60
CYM74B430 CYM74P430/31 CYM74S430/31
74B430-66 66 15 ns 15 ns
Synchronous Pipelined Cache Modules Part Number Cache Size System Clock (MHz) Data tCDV Tag tAA 50 13.5 ns 30 ns 74P430-50 256 KB 60 10 ns 20 ns 66 8.5 ns 15 ns 74P430-60 74P430-66 50 13.5 ns 30 ns 74P431-50 512 KB 60 10 ns 20 ns 66 8.5 ns 15 ns 74P431-60 74P431-66
Synchronous Burst Cache Modules Part Number Cache Size System Clock (MHz) Data tCDV Tag tAA 50 13.5 ns 30 ns 74S430-50 256 KB 60 10 ns 20 ns 66 8.5 ns 15 ns 74S430-60 74S430-66 50 13.5 ns 30 ns 74S431-50 512 KB 60 10 ns 20 ns 66 8.5 ns 15 ns 74S431-60 74S431-66
4
PRELIMINARY
PinConfiguration
Dual Read-Out SIMM (DIMM) Top View
GND TIO1 TIO7 TIO5 TIO3 RSVD VCC RSVD (CYM74P43X, CYM74S43x) ADV / (CYM74B430) CAA4 GND COE CWE5 CWE7 CWE1 VCC CWE3 (CYM74P43X, CYM74S43x) NC / (CYM74B430) CAB3 (CYM74P43X, CYM74S43x) NC / (CYM74B430) CALE GND RSVD A4 A6 A8 A10 VCC A17 GND A9 A14 A15 RSVD PD0 PD2 PD4 GND (CYM74P43X, CYM74S43x) CLK0 / (CYM74B430) NC GND D63 VCC D61 D59 D57 GND D55 D53 D51 D49 GND D47 D45 D43 VCC D41 D39 D37 GND D35 D33 D31 VCC D29 D27 D25 GND D23 D21 D19 VCC D17 D15 D13 GND D11 D9 D7 VCC D5 D3 D1 GND 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
CYM74B430 CYM74P430/31 CYM74S430/31
GND TIO0 TIO2 TIO6 TIO4 RSVD NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) TWE CAA3 (CYM74B430) / ADSC (CYM74P43X, CYM74S43X) GND CWE4 CWE6 CWE0 CWE2 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) CAB4 (CYM74B430) / CCS (CYM74P43X, CYM74S43X) (GWE) (CYM74P43X (BWE) (CYM74P43X) GND A3 A7 A5 A11 A16 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) NC (74B430, 74S430) / GND (74P430) / A18 (74P431, 74S431) GND A12 A13 NC (CYM74B430) / ADSP (CYM74P43X, CYM74S43X) CS (CYM74B430) / NC (CYM74P43X, CYM74S43X) NC (ECS2) PD1 PD3 GND NC (CYM74B430, CYM74P430) / CLK1 (CYM74P431, CYM74S43X) GND D62 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) D60 D58 D56 GND D54 D52 D50 D48 GND D46 D44 D42 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) D40 D38 D36 GND D34 D32 D30 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) D28 D26 D24 GND D22 D20 D18 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) D16 D14 D12 GND D10 D8 D6 NC (CYM74B430) / VCCQ (CYM74P43X, CYM74S43X) D4 D2 D0 74B430-5 GND
5
PRELIMINARY
Pin Definitions
Common Signals VCC GND A[18:3] COE CWE[7:0] PD0-PD 4 D[63:0] TIO[7:0] TWE NC RSVD CYM74B430 Only Signals CAA[4:3] CAB[4:3] CALE CS CYM74P43X, CYM74S43X Signals VCCQ ADSP ADSC ADV CCS CLK[1:0] 3.3V Supply Processor Address Strobe Cache Controller Address Strobe Burst Address Advance Chip Select Clock signals, CLK1 not used on CYM74P430 Lower two address bits for bank 0 Lower two address bits for bank 1 Latch Enable Chip Select Description 5V Supply Ground Addresses from processor Output Enable Byte Write Enables Presence Detect output pins Data lines from processor Tag data bits Tag Write Enable signal Signal not connected on module Reserved Description Description
CYM74B430 CYM74P430/31 CYM74S430/31
Presence Detect Pins
PD4 Asynchronous - CYM74B430 Synchronous Pipelined - CYM74P430 Synchronous Pipelined - CYM74P431 Synchronous Burst - CYM74S430 Synchronous Burst - CYM74S431 GND TBD TBD GND GND PD3 NC TBD TBD NC GND PD2 GND TBD TBD GND NC PD1 GND TBD TBD NC NC PD0 NC TBD TBD GND GND
6
PRELIMINARY
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................. -55C to +125C Ambient Temperature with Power Applied ........................................ -0C to +70C 3.3V Supply Voltage to Ground Potential.... -0.5V to +5.25V 5V Supply Voltage to Ground Potential....... -0.5V to +5.25V DC Voltage Applied to Outputs in High Z State .............................................. -0.5V to +4.6V DC Input Voltage........................................... -0.5V to +4.6V Output Current into Outputs (LOW) ............................. 20 mA
CYM74B430 CYM74P430/31 CYM74S430/31
Operating Range
Range Commercial (CYM74B430) Commercial (CYM74P43X, CYM74S43X) Ambient Temperature 0C to +70C 0C to +70C VCC 5V 5% 5V 5% VCCQ N/A 5V 5% 3.3V+ 10% - 5%
Electrical Characteristics Over the Operating Range
Parameter VIH VIL VIL VOH VOL ICC (74B430) ICC (74P430) ICC (74P431) ICC (74S430) ICC (74S431) Description Input HIGH Voltage Input LOW Voltage Input LOW Voltage Output HIGH Voltage Output LOW Voltage VCC Operating Supply Current VCC Operating Supply Current VCC Operating Supply Current VCC Operating Supply Current VCC Operating Supply Current CYM74B430 CYM74P43X, CYM74S43X VCC=Min. IOH = -4 mA VCC=Min. IOL = 8 mA VCC=Max., IOUT=0 mA, f=fMAX=1/tRC VCC=Max., IOUT=0 mA, f=fMAX=1/tRC VCC=Max., IOUT=0 mA, f=fMAX=1/tRC VCC=Max., IOUT=0 mA, f=fMAX=1/tRC VCC=Max., IOUT=0 mA, f=fMAX=1/tRC Test Condition Min. 2.2 -0.5 -0.3 2.4 0.4 1600 TBD TBD 1200 1400 Max. VCC + 0.3 0.8 0.8 Unit V V V V V mA mA mA mA mA
Ordering Information
Speed (MHz) 50 Ordering Code CYM74B430PM-50C CYM74P430PM-50C CYM74P431PM-50C CYM74S430PM-50C CYM74S431PM-50C 60 CYM74B430PM-60C CYM74P430PM-60C CYM74P431PM-60C CYM74S430PM-60C CYM74S431PM-60C 66 CYM74B430PM-66C CYM74P430PM-66C CYM74P431PM-66C CYM74S430PM-66C CYM74S431PM-66C Document #: 38-M-00074-A Package Name PM34 TBD TBD PM28 PM28 PM34 TBD TBD PM28 PM28 PM34 TBD TBD PM28 PM28 160-Pin Dual-Readout SIMM 160-Pin Dual-Readout SIMM Package Type 160-Pin Dual-Readout SIMM Description Async 256 KB Sync pipelined 256 KB Sync pipelined 512 KB Sync Burst 256 KB Sync Burst 512 KB Async 256 KB Sync pipelined 256 KB Sync pipelined 512 KB Sync Burst 256 KB Sync Burst 512 KB Async 256 KB Sync pipelined 256 KB Sync pipelined 512 KB Sync Burst 256 KB Sync Burst 512 KB Commercial Commercial Operating Range Commercial
7
PRELIMINARY
Package Diagrams
160-Pin Dual Readout SIMM PM28
CYM74B430 CYM74P430/31 CYM74S430/31
160-Pin Dual Readout SIMM PM34
(c) Cypress Semiconductor Corporation, 1995. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.


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